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FIB

Technical Concept

Focused Ion Beam microscope(FIB) uses gallium(Ga)as a metal ion source, can be used for lithography by ion sputtering, deposition and etching for metal and oxide, and thus is a great tool for MEMS.

Focused Ion Beam microscope (FIB) uses gallium (Ga) as a metal ion source, whose extreme low vapor pressor of 6.98×10-38 Torr is proper for various vacuum environments, even UHV. The system adds a strong electric field to melt and thus modify the shape of the metal source. Finally, the source holds a Taylor-cone shape whose apex is sharp enough to eject a beam of Ga ions. The beam with energy dispersion of 4.5 ev and brightness of 106 A/cm2.sr can be focused to an area smaller than 10 nm and is thus used for nano-lithography.

 

A FIB system consists of a liquid ion source, focusing and scanning lenses, a moving stage, a gas inlet system (GIS), and signal detectors. It can be used for lithography by ion sputtering, deposition and etching for metal and oxide, and thus is a great tool for MEMS.

 

A FIB system combined with an SEM is called as a dual-beam FIB. Such machines can be used for both non-destructive nano-inspection by its SEM mode and destructive nano-lithography by its FIB mode. It is powerful in precise nano-lithgoraphy of a selected local area. For example, it has been widely used for TEM sample preparation.

 

 

 

Applications

  1. IC circuit repair
  2. Cross-sectional inspection on selected areas.
  3. Ion Channeling Contrast
  4. TEM sample preparation

A focused ion beam system. 

(a) liquid ion beam source 

(b) single beam system with GIS (gas of Br2、XeF2、TEOS) for circuit repair

(c) Dual-beam FIB system

 

 

 

Application Cases

Case1.Circuit Editing

The original design for developing ICs usually contains many mistakes to cause function error. Therefore a trial IC fabrication is needed for testing function accuracy. Incorrect IC circuit design is one of the most important reasons to cause error. Therefore a method to repair the circuit of trial ICs is needed for the development of ICs. With its great power on cutting, etching, and deposition for metals and oxides, FIB technology is inexpensive and efficient for circuit repair or editing.

 

A circuit editing can be performed in the front-side and back-side depending on the difference of packages and repaired areas.

  • Front-side editing starts from topsides of IC chips and then processes lower layer by layer, as typically shown in Figure-2.
  • Back-side editing starts from the backsides of IC chips (Si substrate) and then gradually processes to the upper area as typically shown in Figure-3.

 

In general, the difficulty of editing depends on circuit structures. Difficulty decreases with increasing area allowed to process. Processing upper layers are easier. Wires of copper are easier to edit than those of Al. The editing difficulty for the front side is lower than that for the back side. An editing process usually includes passivation or oxide removal, metal wire cutting, metal deposition, connecting wire deposition, metal pad deposition, oxide deposition, capacitor creation, and resistor fabrication.

 

Insulator deposition is caused by ion beam induced gas, such as TEOS or TMCTS, decomposition to form SiO2. There are two materials of W and Pt that can be selected for metal deposition. The former has lower resistance and better hole-filling power, but a lower deposition rate than the latter. The gas of C10H8 is used for carbon film deposition.

 

Aluminum can be etched by I2, Br2, or Cl2 while cooper can be removed by a combination of ion sputtering and water vapor. Insulator layers are etched by XeF2.

 

(a) DecapsulationFigure-2.A typical case showing the process of front-side editing.

(b) digging holes and filling metal

(c) cutting and connecting wires

(d) Deposited pt wire

(e) cutting in M2

 


(a) Probing padsFigure-3.A typical example of back-side editing.

(b) a typical cross-sectional image of a back-side-edited sample

 

The circuit-editing for advanced IC circuits becomes more and more difficult because of continuously decreasing wire pitch. The difficulty can be overcome through the following three directions.

 

  1. Improving system quality, such as ion beam stability.
  2. Developing more powerful reactive gases for etching and deposition.
  3. Reducing charge accumulation.

 

 

Case 2.Cross-sectional inspection

FIB is allowed to create holes with precise location accuracy and thus is powerful to analyze failures inside samples. Such analysis usually exploits a dual-beam FIB system of which the FIB mode is used to cut through failures whose position and morphology image are provided by the SEM mode. For example, The image below typically shows how to obtain a cross-sectional IC image.

 

A schematic figure shows a typical process for a cross-sectional observation.

An SEM mode image of a cross-sectional IC.

 

 

 

Cases 3.Ion Channeling Contrast

Many solid crystals have channel-like gaps along with specific crystalline directions. FIB systems are powerful enough to observe such gaps because their ion beams aligned and mis-aligned with gaps contribute clear image-contrast difference caused by distinct second electron and ion emissions. This phenomenon is called ion channeling contrast and its mechanism can be schematically explained by the following figure.

 

 

 

A schematic figure shows the difference between ion beam aligned and misaligned channel directions.

 

 

Images of ion channeling contrast are powerful enough to clearly show stacking structures of different crystals and allow for analysis of grain size and direction. For example, the figure below shows cross-sectional images of a solder ball by optical microscopy (left) and FIB (right). The FIB image provides more information of Pb-Sn grain structure, caused by temperature difference between the PCB and IC in a binding process.

 

Cross-sectional images of a solder ball by (a) OM and (b) FIB

 

 

 

Case 4.TEM sample preparation (Pre-thin, Lift-out, Omni-probe)

There are three FIB-based methods to prepare TEM samples:pre-thin, lift-out, and omni-probe.

 

pre-thin

The figure shows a typical process for pre-thin method which thins down samples to 5-10 um by mechanical polish and then to 0.1 um by FIB lithography.

 

This method can be employed to create large (~50 um) and uniform TEM samples without deformation. However, it is more complicated and time-consuming compared to other methods.

 

 

Lift-out

This figure shows a typical process for the lift-out method, which uses FIB to locally thin down samples. The thin area is separated from the sample by “U-cut” which employs FIB to bombard the area edge. Finally, the thin specimen is shifted to a Cu-grid with carbon films by a glass probe with static electrical attraction.

 

This is the most efficient sample preparation method with a typical working time of less than one hour and is thus widely used. However, it holds a drawback of being hard to rework or process specimens after shifting to Cu-grids. Therefore, the quality of the treated sample is highly dependent on the preparation ability of engineers.

 

 

Omni-probe

This figure shows a typical process for omni-probe method, which uses FIB to locally thin down samples to 1 to 2 um. A probe is connected to the thin area by FIB-deposition of Pt. The probe is used to shift the thinned specimen to a proper position and angle for precisely modifying the specimen morphology by FIB bombardment. The modifying process can be performed several times until the morphology is proper for TEM inspection.

 

Although this process needs a longer working time of 1.5 to 2 hours, its reworking power is proper for error-unacceptable sample preparation.

 

(a)-(f) Processes of sample preparation

(a)-(b) sticking sample to probe

(c) take out sample

(d) shift sample to the holder

(e) disconnecting sample and probe

(f) put holder with the sample to TEM



 

Contact

Taiwan|SoC Lab

Mr. Liu

: +886-3-6116678 ext:2619

: +886-970-057-126

: fa-cut@ma-tek.com

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Mr. Zheng

: +886-3-6116678 ext : 5160

: +886-970-036-030

: tainan@ma-tek.com

 

Shanghai Lab

Mr. Ma

: +86-21-5079-3616 ext:7109 / 7064

: - - - - - - -

tem_sh@ma-tek.com

Xiamen Lab

Mr. XIE

: - - - - - - -

: 189-6512-1056

  189-6510-9731

: tem_xm@ma-tek.com

 

Shenzhen Lab

Mr. SU

: - - - - - - -

: 135-4328-5517

tem_sz@ma-tek.com

Japan Nagoya Lab

Mr. Li

: +81-52-705-1688

: +81-80-6424-7669

: jptem@ma-tek.com