IC OLT and ELFR Test
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IC Operation Life Test and Early Life Failure Rate (ELFR) Test |
The semiconductor industry is the locomotive of the electronics industry. With the advancement in process technology and the request of product quality, the international organization, JEDEC, has generated a number of basic standards.
To pass the operation life test is the most important criterion due to the complexity of the Burn-in Board design and fabrication, this makes OLT and EFLR more difficult than the general stress test.
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Burn-In Board Design |
The Burn-In Board (BIB) design and fabrication are extremely important and complicated for semiconductor testing due to the consideration of the operation of IC at a higher frequency, power consumption, thermal generation, impedance matching and etc.
MA-tek’s reliability test laboratory provides one-stop service from BIB design, fabrication, and operation life tests. Considering the cost for our customers, MA-tek prepares the universal board and DUT card to accommodate the appropriate product specification. For products with special specifications, MA-tek also can assist our customers in designing a BIB for testing.
Universal Burn-In Board |
Socket Sample Diagram |
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Accelerated Lifetime Test |
By applying temperature, voltage, or current to the device under test, the accelerated life test accelerates the degradation of the device to predict the lifetime under actual operation.
The testing requires the use of a burn-in board. The test temperature is determined by the operating environment and device junction temperature. Types of accelerated life test are described as follows：
１．HTOL, High Temperature Operating Life Test
The purpose of this test is to use temperature and voltage to accelerate devices degradation to predict the lifetime under normal operation. The input test signal is dynamic rather than static bias, which is closer to the actual product in use.
２．ELFR, Early Life Failure Rate
The purpose of the test is to use high temperature and voltage to accelerate the failure and to screen out the early failure devices. The early life failure rate (ELFR) of the device then can be obtained. The input test signal is dynamic rather than static bias.
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Schematic of OLT
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Lifetime and Failure Rate Prediction |
Using temperature as the acceleration factor, the Arrhenius equation is utilized to estimate the degree of acceleration by choosing appropriate activation energy. Through the accelerated life test, the modeled lifetime of the product under a specific confidence level can be obtained.
The reliability of a semiconductor device is usually expressed by failure in time (FIT) and mean time to fail (MTTF). However, customers are not easy to understand what the risks are in the future through the use of FIT or MTTF? It is also difficult for customers to do inventory management. Another common way of life estimation, different from the traditional FIT or MTTF methods, is to use warranty time (for example, 10 years) divided by the accelerated factor to estimate the test time required. Automotive electronics is the code type representative.
MA-tek’s device life test services are operated by a group of professionals in the semiconductor fields to provide one-stop service to customers. The device life test is provided both in Taiwan and Shanghai laboratories. The capabilities of burn-in systems are listed in Table 1 to fulfill the needs of all the customers.
 Specifications of component burn-in machines |
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