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其他应用 FLASH, LOGIC, POWER, SiGe

TEM Analysis of ICs

 

图-1 (a)50 nm Gate Structure;(b)Ultra-thin Gate Dielectrics;(c)Via Structure

 

TEM/HAADF image of Silicide

 

图-2 (a) TEM;(b) HAADF

 

 

TEM Analysis of SiGe

High Resolution TEM Imaging

图-3 (a)

图-3 (b)

 

 

TEM Analysis of SRAM

Total delayer to expose the bare Si substrate

 

图-4 (a) Plan-view TEM;(b) Plan-view TEM

 

Dislocation in SRAM cell array

图-5

 

 

 

TEM Analysis of DRAM

HSG structure

 

图-6 Capacitor aspect ratio = 1.98/0.24= 8.25

 

 

图-7